1. Field of the Invention
The present invention relates generally to substrates for mounting of electronic components and the resulting packages. More particularly, the present invention relates to a method of fabricating an embedded circuit pattern and the resulting structure.
2. Description of the Related Art
To form a circuit pattern, features in a dielectric layer are filled with plated copper. To prevent the formation of dimples in the plated copper as well as to ensure that the features are completely filled, an over-plate process is typically used.
During this over-plate process, the features are overfilled with plated copper such that the copper not only fills the features but also is plated with a significant thickness across the entire substrate.
The over-plate process is followed by an over-etch process. During this over-etch process, the excess plated copper is removed by etching. Further, to ensure that all of the excess plated copper is removed and to avoid shorts within the circuit pattern, the plated copper is over etched such that the circuit pattern is recessed into the dielectric layer.
Although the over-plate process and over-etch process are effective in producing a circuit pattern, the over-etch process is difficult to accurately control. Thus, the amount to which the circuit pattern is etched during the over-etch process varies from batch to batch. Accordingly, circuit pattern impedance as well as other electrical characteristics varies from batch to batch, which is generally undesirable.